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dc.contributor.authorBunin, Grygoriy
dc.contributor.authorSchneider, Axel
dc.contributor.authorHaubelt, Christian
dc.contributor.authorLanger, Jan
dc.contributor.authorHeinkel, Ulrich
dc.contributor.editorHochberger, Christian
dc.contributor.editorLiskowsky, Rüdiger
dc.date.accessioned2019-06-04T08:52:21Z
dc.date.available2019-06-04T08:52:21Z
dc.date.issued2006
dc.identifier.isbn978-3-88579-188-1
dc.identifier.issn1617-5468
dc.identifier.urihttp://dl.gi.de/handle/20.500.12116/23521
dc.description.abstractFormal verification has become a key technology to ensure the quality of complex (hardware/software) systems. Although formal verification is widely used in the hardware design phase, it plays a minor role in software or even system development. In this paper, we describe how we used the model checker NuSMV to automatically generate executable test cases from an abstract system description.en
dc.language.isoen
dc.publisherGesellschaft für Informatik e.V.
dc.relation.ispartofINFORMATIK 2006 – Informatik für Menschen – Band 2, Beiträge der 36. Jahrestagung der Gesellschaft für Informatik e.V. (GI)
dc.relation.ispartofseriesLecture Notes in Informatics (LNI) - Proceedings, Volume P-94
dc.titleAutomatic test case generation with NuSMVen
dc.typeText/Conference Paper
dc.pubPlaceBonn
mci.reference.pages262-263
mci.conference.sessiontitleRegular Research Papers
mci.conference.locationDresden
mci.conference.date2.-6. Oktober 2006


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