Self-checking carry-select adder with sum-bit duplication

Zusammenfassung
In this paper the first code-disjoint totally self-checking carry-select adder is proposed. The adder blocks are fast ripple adders with a single NAND-gate delay for carry-propagation per cell. In every adder block both the sum-bits and the corresponding inverted sum-bits are simultaneously implemented. The parity of the input operands is checked against the X OR-sum of the propagate signals. For 64 bits area and maximal delay are determined by the SYNOPSYS CAD tool of the EUROCHIP project. Compared to a 64 bit carry-select adder without error detection the delay of the most significant sum-bit does not increase. Compared to a completely duplicated code-disjoint carry-select adder we save 240 X OR-gates.
  • Vollständige Referenz
  • BibTeX
Sogomonyan, E. S., Marienfeld, D., Ocheretnij, V. & Gössel, M., (2004). Self-checking carry-select adder with sum-bit duplication. In: Brinkschulte, U., Becker, J., Fey, D., Großpietsch, K.-E., Hochberger, C., Maehle, E. & Runkler, T. A. (Hrsg.), ARCS 2004 – Organic and pervasive computing. Bonn: Gesellschaft für Informatik e.V.. (S. 84-91).
@inproceedings{mci/Sogomonyan2004,
author = {Sogomonyan, E. S. AND Marienfeld, D. AND Ocheretnij, V. AND Gössel, M.},
title = {Self-checking carry-select adder with sum-bit duplication},
booktitle = {ARCS 2004 – Organic and pervasive computing},
year = {2004},
editor = {Brinkschulte, Uwe AND Becker, Jürgen AND Fey, Dietmar AND Großpietsch, Karl-Erwin AND Hochberger, Christian AND Maehle, Erik AND Runkler, Thomas A.} ,
pages = { 84-91 },
publisher = {Gesellschaft für Informatik e.V.},
address = {Bonn}
}
DateienGroesseFormatAnzeige
GI-Proceedings.41-8.pdf106.4Kb PDF Öffnen

Haben Sie fehlerhafte Angaben entdeckt? Sagen Sie uns Bescheid: Feedback abschicken

Mehr Information

ISBN: 3-88579-370-9
ISSN: 1617-5468
Datum: 2004
Sprache: en (en)
Typ: Text/Conference Paper
Sammlungen

Zur Langanzeige