A Delay Estimation of Rescheduling Schemes for Static Scheduled Processor Architectures

dc.contributor.author	Schölzel, M.
dc.date.accessioned	2017-12-06T08:58:48Z
dc.date.available	2017-12-06T08:58:48Z
dc.date.issued	2010
dc.identifier.issn	0724-5319
dc.identifier.uri	http://dl.gi.de/handle/20.500.12116/8522
dc.description.abstract	M. Schölzel, Brandenburg University of Technology, Computer Engineering Group, Cottbus, Germany, E-Mail: [email protected]	en
dc.language.iso	en
dc.publisher	Gesellschaft für Informatik e.V.
dc.relation.ispartof	FERS-Mitteilungen: Vol. 28, No. 1
dc.relation.ispartofseries	FERS-Mitteilungen
dc.subject	Discrete Cosine Transformation
dc.subject	Clock Cycle
dc.subject	Data Path
dc.subject	Design Space Exploration
dc.subject	Permanent Fault
dc.title	A Delay Estimation of Rescheduling Schemes for Static Scheduled Processor Architectures	en
dc.type	Text/Journal Article
mci.reference.pages	53-60
dc.identifier.doi	10.1007/BF03345445