Zur Kurzanzeige

dc.contributor.authorChristgau, Steffen
dc.contributor.authorSchnor, Bettina
dc.date.accessioned2020-03-11T00:06:22Z
dc.date.available2020-03-11T00:06:22Z
dc.date.issued2017
dc.identifier.issn0177-0454
dc.identifier.urihttp://dl.gi.de/handle/20.500.12116/31941
dc.description.abstractDistributed hash tables are a common approach for fast data access. For this kind of application, a synchronization scheme with Readers and Writers semantic is well suited. This paper presents the design of an implementation of MPI passive target synchronization with Readers and Writers semantic. The implementation is discussed for the Single-Chip Cloud Computer, a non-cachecoherent many-core CPU with shared memory.en
dc.language.isoen
dc.publisherGesellschaft für Informatik e.V., Fachgruppe PARS
dc.relation.ispartofPARS-Mitteilungen: Vol. 34, Nr. 1
dc.titleDesign of MPI Passive Target Synchronization for a Non-Cache-Coherent Many-Core Processoren
dc.typeText/Journal Article
dc.pubPlaceBerlin
mci.reference.pages43-53


Dateien zu dieser Ressource

Thumbnail

Zur Kurzanzeige